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authorKewen Lin <linkw@linux.ibm.com>2022-06-27 21:50:26 -0500
committerKewen Lin <linkw@linux.ibm.com>2022-06-27 21:50:26 -0500
commitf9764ea128c99ba1c10de21a092266cd7da8700a (patch)
tree84f978f3999729bfe3fc2d46704bc777365dd9ba
parentDaily bump. (diff)
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rs6000: Simplify *rotl<mode>3_insert_4 by removing DImodeHEADtrunkmaster
define_insn *rotl<mode>3_insert_4 use mode iterator GPR which consists of SImode and conditional DImode, but the condition of this define_insn requires the mode should be SImode. By further checking, it's found that the rldimi instruction can not be used for this pattern since the required mask can not be represented correctly. We can have the fixed mask end 31 with rlwimi, but can not have the fixed mask end 63 with rldimi as it has to be (63 - SH) always. So this patch simplifies this define_insn to use SImode only. gcc/ChangeLog: * config/rs6000/rs6000.md (*rotl<mode>3_insert_4): Replace mode iterator GPR with SImode, adjust the condition and output template, rename to ... (*rotlsi3_insert_4): ... this.
-rw-r--r--gcc/config/rs6000/rs6000.md25
1 files changed, 8 insertions, 17 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 090dbcff61d..1367a2cb779 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -4225,23 +4225,14 @@
4225 operands[4] = GEN_INT ((HOST_WIDE_INT_1U << INTVAL (operands[2])) - 1); 4225 operands[4] = GEN_INT ((HOST_WIDE_INT_1U << INTVAL (operands[2])) - 1);
4226}) 4226})
4227 4227
4228(define_insn "*rotl<mode>3_insert_4" 4228(define_insn "*rotlsi3_insert_4"
4229 [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") 4229 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
4230 (ior:GPR (and:GPR (match_operand:GPR 3 "gpc_reg_operand" "0") 4230 (ior:SI (and:SI (match_operand:SI 3 "gpc_reg_operand" "0")
4231 (match_operand:GPR 4 "const_int_operand" "n")) 4231 (match_operand:SI 4 "const_int_operand" "n"))
4232 (lshiftrt:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") 4232 (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
4233 (match_operand:SI 2 "const_int_operand" "n"))))] 4233 (match_operand:SI 2 "const_int_operand" "n"))))]
4234 "<MODE>mode == SImode && 4234 "INTVAL (operands[2]) + exact_log2 (-UINTVAL (operands[4])) == 32"
4235 GET_MODE_PRECISION (<MODE>mode) 4235 "rlwimi %0,%1,32-%h2,%h2,31"
4236 == INTVAL (operands[2]) + exact_log2 (-UINTVAL (operands[4]))"
4237{
4238 operands[2] = GEN_INT (GET_MODE_PRECISION (<MODE>mode)
4239 - INTVAL (operands[2]));
4240 if (<MODE>mode == SImode)
4241 return "rlwimi %0,%1,%h2,32-%h2,31";
4242 else
4243 return "rldimi %0,%1,%H2,64-%H2";
4244}
4245 [(set_attr "type" "insert")]) 4236 [(set_attr "type" "insert")])
4246 4237
4247(define_insn "*rotlsi3_insert_5" 4238(define_insn "*rotlsi3_insert_5"