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authorH.J. Lu <hjl.tools@gmail.com>2021-11-30 05:31:26 -0800
committerH.J. Lu <hjl.tools@gmail.com>2021-12-06 08:16:49 -0800
commit70b043845d7c378c6a9361a6769885897d1018c2 (patch)
tree0a3fdd43c8343743500745aafb483837846bbf21 /libsanitizer
parenttree-optimization/103581 - fix masked gather on x86 (diff)
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libsanitizer: Use SSE to save and restore XMM registers
Use SSE, instead of AVX, to save and restore XMM registers to support processors without AVX. The affected codes are unused in upstream since https://github.com/llvm/llvm-project/commit/66d4ce7e26a5 and will be removed in https://reviews.llvm.org/D112604 This fixed FAIL: g++.dg/tsan/pthread_cond_clockwait.C -O0 execution test FAIL: g++.dg/tsan/pthread_cond_clockwait.C -O2 execution test on machines without AVX. PR sanitizer/103466 * tsan/tsan_rtl_amd64.S (__tsan_trace_switch_thunk): Replace vmovdqu with movdqu. (__tsan_report_race_thunk): Likewise.
Diffstat (limited to 'libsanitizer')
-rw-r--r--libsanitizer/tsan/tsan_rtl_amd64.S128
1 files changed, 64 insertions, 64 deletions
diff --git a/libsanitizer/tsan/tsan_rtl_amd64.S b/libsanitizer/tsan/tsan_rtl_amd64.S
index 632b19d1815..c15b01e49e5 100644
--- a/libsanitizer/tsan/tsan_rtl_amd64.S
+++ b/libsanitizer/tsan/tsan_rtl_amd64.S
@@ -45,22 +45,22 @@ ASM_SYMBOL(__tsan_trace_switch_thunk):
45 # All XMM registers are caller-saved. 45 # All XMM registers are caller-saved.
46 sub $0x100, %rsp 46 sub $0x100, %rsp
47 CFI_ADJUST_CFA_OFFSET(0x100) 47 CFI_ADJUST_CFA_OFFSET(0x100)
48 vmovdqu %xmm0, 0x0(%rsp) 48 movdqu %xmm0, 0x0(%rsp)
49 vmovdqu %xmm1, 0x10(%rsp) 49 movdqu %xmm1, 0x10(%rsp)
50 vmovdqu %xmm2, 0x20(%rsp) 50 movdqu %xmm2, 0x20(%rsp)
51 vmovdqu %xmm3, 0x30(%rsp) 51 movdqu %xmm3, 0x30(%rsp)
52 vmovdqu %xmm4, 0x40(%rsp) 52 movdqu %xmm4, 0x40(%rsp)
53 vmovdqu %xmm5, 0x50(%rsp) 53 movdqu %xmm5, 0x50(%rsp)
54 vmovdqu %xmm6, 0x60(%rsp) 54 movdqu %xmm6, 0x60(%rsp)
55 vmovdqu %xmm7, 0x70(%rsp) 55 movdqu %xmm7, 0x70(%rsp)
56 vmovdqu %xmm8, 0x80(%rsp) 56 movdqu %xmm8, 0x80(%rsp)
57 vmovdqu %xmm9, 0x90(%rsp) 57 movdqu %xmm9, 0x90(%rsp)
58 vmovdqu %xmm10, 0xa0(%rsp) 58 movdqu %xmm10, 0xa0(%rsp)
59 vmovdqu %xmm11, 0xb0(%rsp) 59 movdqu %xmm11, 0xb0(%rsp)
60 vmovdqu %xmm12, 0xc0(%rsp) 60 movdqu %xmm12, 0xc0(%rsp)
61 vmovdqu %xmm13, 0xd0(%rsp) 61 movdqu %xmm13, 0xd0(%rsp)
62 vmovdqu %xmm14, 0xe0(%rsp) 62 movdqu %xmm14, 0xe0(%rsp)
63 vmovdqu %xmm15, 0xf0(%rsp) 63 movdqu %xmm15, 0xf0(%rsp)
64 # Align stack frame. 64 # Align stack frame.
65 push %rbx # non-scratch 65 push %rbx # non-scratch
66 CFI_ADJUST_CFA_OFFSET(8) 66 CFI_ADJUST_CFA_OFFSET(8)
@@ -78,22 +78,22 @@ ASM_SYMBOL(__tsan_trace_switch_thunk):
78 pop %rbx 78 pop %rbx
79 CFI_ADJUST_CFA_OFFSET(-8) 79 CFI_ADJUST_CFA_OFFSET(-8)
80 # Restore scratch registers. 80 # Restore scratch registers.
81 vmovdqu 0x0(%rsp), %xmm0 81 movdqu 0x0(%rsp), %xmm0
82 vmovdqu 0x10(%rsp), %xmm1 82 movdqu 0x10(%rsp), %xmm1
83 vmovdqu 0x20(%rsp), %xmm2 83 movdqu 0x20(%rsp), %xmm2
84 vmovdqu 0x30(%rsp), %xmm3 84 movdqu 0x30(%rsp), %xmm3
85 vmovdqu 0x40(%rsp), %xmm4 85 movdqu 0x40(%rsp), %xmm4
86 vmovdqu 0x50(%rsp), %xmm5 86 movdqu 0x50(%rsp), %xmm5
87 vmovdqu 0x60(%rsp), %xmm6 87 movdqu 0x60(%rsp), %xmm6
88 vmovdqu 0x70(%rsp), %xmm7 88 movdqu 0x70(%rsp), %xmm7
89 vmovdqu 0x80(%rsp), %xmm8 89 movdqu 0x80(%rsp), %xmm8
90 vmovdqu 0x90(%rsp), %xmm9 90 movdqu 0x90(%rsp), %xmm9
91 vmovdqu 0xa0(%rsp), %xmm10 91 movdqu 0xa0(%rsp), %xmm10
92 vmovdqu 0xb0(%rsp), %xmm11 92 movdqu 0xb0(%rsp), %xmm11
93 vmovdqu 0xc0(%rsp), %xmm12 93 movdqu 0xc0(%rsp), %xmm12
94 vmovdqu 0xd0(%rsp), %xmm13 94 movdqu 0xd0(%rsp), %xmm13
95 vmovdqu 0xe0(%rsp), %xmm14 95 movdqu 0xe0(%rsp), %xmm14
96 vmovdqu 0xf0(%rsp), %xmm15 96 movdqu 0xf0(%rsp), %xmm15
97 add $0x100, %rsp 97 add $0x100, %rsp
98 CFI_ADJUST_CFA_OFFSET(-0x100) 98 CFI_ADJUST_CFA_OFFSET(-0x100)
99 pop %r11 99 pop %r11
@@ -163,22 +163,22 @@ ASM_SYMBOL(__tsan_report_race_thunk):
163 # All XMM registers are caller-saved. 163 # All XMM registers are caller-saved.
164 sub $0x100, %rsp 164 sub $0x100, %rsp
165 CFI_ADJUST_CFA_OFFSET(0x100) 165 CFI_ADJUST_CFA_OFFSET(0x100)
166 vmovdqu %xmm0, 0x0(%rsp) 166 movdqu %xmm0, 0x0(%rsp)
167 vmovdqu %xmm1, 0x10(%rsp) 167 movdqu %xmm1, 0x10(%rsp)
168 vmovdqu %xmm2, 0x20(%rsp) 168 movdqu %xmm2, 0x20(%rsp)
169 vmovdqu %xmm3, 0x30(%rsp) 169 movdqu %xmm3, 0x30(%rsp)
170 vmovdqu %xmm4, 0x40(%rsp) 170 movdqu %xmm4, 0x40(%rsp)
171 vmovdqu %xmm5, 0x50(%rsp) 171 movdqu %xmm5, 0x50(%rsp)
172 vmovdqu %xmm6, 0x60(%rsp) 172 movdqu %xmm6, 0x60(%rsp)
173 vmovdqu %xmm7, 0x70(%rsp) 173 movdqu %xmm7, 0x70(%rsp)
174 vmovdqu %xmm8, 0x80(%rsp) 174 movdqu %xmm8, 0x80(%rsp)
175 vmovdqu %xmm9, 0x90(%rsp) 175 movdqu %xmm9, 0x90(%rsp)
176 vmovdqu %xmm10, 0xa0(%rsp) 176 movdqu %xmm10, 0xa0(%rsp)
177 vmovdqu %xmm11, 0xb0(%rsp) 177 movdqu %xmm11, 0xb0(%rsp)
178 vmovdqu %xmm12, 0xc0(%rsp) 178 movdqu %xmm12, 0xc0(%rsp)
179 vmovdqu %xmm13, 0xd0(%rsp) 179 movdqu %xmm13, 0xd0(%rsp)
180 vmovdqu %xmm14, 0xe0(%rsp) 180 movdqu %xmm14, 0xe0(%rsp)
181 vmovdqu %xmm15, 0xf0(%rsp) 181 movdqu %xmm15, 0xf0(%rsp)
182 # Align stack frame. 182 # Align stack frame.
183 push %rbx # non-scratch 183 push %rbx # non-scratch
184 CFI_ADJUST_CFA_OFFSET(8) 184 CFI_ADJUST_CFA_OFFSET(8)
@@ -196,22 +196,22 @@ ASM_SYMBOL(__tsan_report_race_thunk):
196 pop %rbx 196 pop %rbx
197 CFI_ADJUST_CFA_OFFSET(-8) 197 CFI_ADJUST_CFA_OFFSET(-8)
198 # Restore scratch registers. 198 # Restore scratch registers.
199 vmovdqu 0x0(%rsp), %xmm0 199 movdqu 0x0(%rsp), %xmm0
200 vmovdqu 0x10(%rsp), %xmm1 200 movdqu 0x10(%rsp), %xmm1
201 vmovdqu 0x20(%rsp), %xmm2 201 movdqu 0x20(%rsp), %xmm2
202 vmovdqu 0x30(%rsp), %xmm3 202 movdqu 0x30(%rsp), %xmm3
203 vmovdqu 0x40(%rsp), %xmm4 203 movdqu 0x40(%rsp), %xmm4
204 vmovdqu 0x50(%rsp), %xmm5 204 movdqu 0x50(%rsp), %xmm5
205 vmovdqu 0x60(%rsp), %xmm6 205 movdqu 0x60(%rsp), %xmm6
206 vmovdqu 0x70(%rsp), %xmm7 206 movdqu 0x70(%rsp), %xmm7
207 vmovdqu 0x80(%rsp), %xmm8 207 movdqu 0x80(%rsp), %xmm8
208 vmovdqu 0x90(%rsp), %xmm9 208 movdqu 0x90(%rsp), %xmm9
209 vmovdqu 0xa0(%rsp), %xmm10 209 movdqu 0xa0(%rsp), %xmm10
210 vmovdqu 0xb0(%rsp), %xmm11 210 movdqu 0xb0(%rsp), %xmm11
211 vmovdqu 0xc0(%rsp), %xmm12 211 movdqu 0xc0(%rsp), %xmm12
212 vmovdqu 0xd0(%rsp), %xmm13 212 movdqu 0xd0(%rsp), %xmm13
213 vmovdqu 0xe0(%rsp), %xmm14 213 movdqu 0xe0(%rsp), %xmm14
214 vmovdqu 0xf0(%rsp), %xmm15 214 movdqu 0xf0(%rsp), %xmm15
215 add $0x100, %rsp 215 add $0x100, %rsp
216 CFI_ADJUST_CFA_OFFSET(-0x100) 216 CFI_ADJUST_CFA_OFFSET(-0x100)
217 pop %r11 217 pop %r11
generated by cgit (git 2.34.1) at 2023-12-03 00:53:39 +0000